CPO Advantages

The main benefit of Co-Packaged Optics (CPO) over traditional pluggable optics (such as standard 400G, 800G, or 1.6T transceivers) boils down to eliminating the “electrical trace bottleneck” by physically co-locating the optical engine on the exact same package substrate as the main compute switch or GPU ASIC.

1. Massive Reduction in Power Consumption (~30%–70% Savings)

The Traditional Problem: Pluggable optical transceivers sit on the front panel of a server rack. To get signals from the main GPU/Switch ASIC to the transceiver, high-speed electrical signals must travel 10 to 20 centimeters over copper circuit board traces (copper PCB). At speeds like 112G or 224G per lane, electrical resistance generates extreme signal degradation, requiring power-hungry Digital Signal Processors (DSPs) and retimers just to boost the signal.
The CPO Advantage: By placing optics right next to the ASIC (shrinking the electrical path from centimeters to a few millimeters), the signal loss drops by over 80%. This eliminates or vastly simplifies the DSPs, reducing optical interconnect power consumption by up to 70% (and overall system-level power by 30%+).

2. Unprecedented Bandwidth Density (Eliminating Front-Panel Congestion)

Traditional switch boxes run out of physical space on their front panels to fit standard pluggable transceiver cages as bandwidth scales to 51.2T, 102.4T, or higher.
CPO integrates optical engines around the perimeter of the chip package inside the unit. Instead of bulky transceiver cages, only ultra-thin fiber cables exit the chassis, allowing data centers to scale to dramatically higher port counts and aggregate bandwidth within the exact same rack footprint.

3. Superior Signal Integrity & Lower Latency

At high data rates (800G and 1.6T+), high-frequency electrical signals suffer heavily from crosstalk, insertion loss, and thermal noise over copper PCB traces.
Converting electrical signals into optical pulses right at the silicon chip boundary maintains clean, un-degraded signal integrity. Removing heavy signal processing stages also reduces end-to-end packet processing latency.

CPO Supply Chain

1. Lumentum (LITE): The Laser & Photonics Component Supplier

Lumentum specializes in laser technology and optical components. In the CPO diagram from your page:

External Laser Source (ELS): Sensitive lasers degrade when exposed to the extreme heat of a Switch ASIC or GPU. Lumentum manufactures the External Laser Source Form Factor Pluggable (ELSFP)—the continuous wave laser module plugged into the front of the switch chassis to feed light into the optics.
Optical Engine Building Blocks: Lumentum supplies Indium Phosphide (InP) lasers, modulators, and optical engine components to the chip packaging ecosystem.

2. ASIC & Silicon Photonics Integrators (e.g., Broadcom, TSMC, Nvidia)

Companies like Broadcom or Nvidia design the Switch ASIC and collaborate with advanced semiconductor foundries/OSATs (like TSMC).
Advanced 3D packaging technology (e.g., TSMC’s COUPE / CoWoS) is used to physically mount the Switch ASIC and the Silicon Photonics Optical Engine side-by-side on the substrate.

3. System OEMs / Equipment Vendors (e.g., Arista Networks, Cisco)

Arista buys the co-packaged ASIC/Optical Engine assembly from the chipmakers/foundries.
Arista builds the complete system around it: adding the motherboard, cooling/liquid-cooling systems, power distribution, front-panel ports (for Lumentum’s external laser modules), and their proprietary operating system (e.g., Arista EOS).

4. The End Customer (Hyperscalers)

Hyperscale cloud providers and AI giants (Meta, Microsoft, Google, xAI) buy the complete, packaged switch chassis from Arista (or NVIDIA) to power their massive GPU clusters.

NPO vs CPO

Near-Packaged Optics (NPO) and Co-Packaged Optics (CPO) are not identical, though they share the same goal: bringing optical interconnects as close to the compute ASIC (GPU, TPU, or Switch chip) as possible to eliminate long, power-hungry copper traces.

Think of NPO as an intermediate stepping stone toward full CPO deployment.

Key Differences

Feature	Near-Packaged Optics (NPO)	Co-Packaged Optics (CPO)
Placement	Mounted on the host system PCB board directly adjacent to the ASIC package.	Mounted directly on the same substrate package as the ASIC.
Integration Complexity	Moderate: Placed as close as possible without sharing the main chip’s substrate.	High: Requires advanced 2.5D/3D semiconductor packaging to integrate silicon photonics onto the main chip substrate.
Thermal & Repairability	Easier to isolate thermally from the hot GPU/ASIC and easier to service/replace.	Harder to manage thermally; if the optical engine fails, replacing it is highly complex.
Electrical Path Length	Very short (1–2 centimeters).	Microscopic (a few millimeters).
Power Savings	Very high (saves ~30–50% power compared to traditional pluggable transceivers).	Maximum savings (saves up to 70% power compared to pluggable transceivers).

Why NPO Matters for Vendors Like Lumentum

NPO offers a faster time-to-market for cloud and AI hyperscalers:

Simpler Implementation: NPO avoids many of the thermal and yield/manufacturing risks associated with embedding optics inside the high-heat ASIC package itself.
Additive Market Growth: NPO allows data center operators to scale optical links across multi-rack compute clusters today while CPO packaging ecosystems continue to mature for widespread rollout in 2027 and 2028.